Background and example embodiments of the inventive subject matter may be described using the context of processors and semiconductor package grid array mounting arrangements, but it is submitted that practice of the inventive subject matter and a scope of the appended claims are not limited thereto.
Power (e.g., power supply current(s) and grounding current(s); hereinafter, sometimes generically called “power current(s)”) requirements for processing systems continue to increase as processor performance capabilities increase. Designing toward more efficient delivery of power current(s) is complicated by the need to meet marketplace demands for smaller-sized devices having the same or greater operating capabilities.
Increasing power current(s) through conduction paths (e.g., pins/sockets, bumps/balls/pads) of present processor package grid arrays (e.g., pin/socket grid arrays, bump/ball grid arrays (BGA), micro BGA (μBGA)) may result in larger power dissipations, but such may, in turn, lead to appreciable heating of a processor package environment. The addition of heat spreaders and heat sinks to counter the heating and lower the temperatures in the package, adds weight to the system. Further, the use of such conduction paths, e.g., pin/socket, to meet current demands of high speed (e.g., 6 GHz) processors may also result in currents through ones of the pins/sockets to exceed safe pin/socket current limits, perhaps by an unacceptable percentage (e.g., 20%). As requirements and demand for power continue to increase, the situation will worsen. Needed are arrangements to efficiently transfer high currents in grid array mounting arrangements.